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PX3511A, PX3511B
Ordering Information
PART NUMBER
PX3511ADAG (Note)
PX3511ADAG-R3 (Note)
PX3511ADDG
PX3511ADDG-RA
PX3511BDAG (Note)
PX3511BDAG-R3 (Note)
PX3511BDDG
PX3511BDDG-RA
PART MARKING
PX3511 ADAG
PX3511 ADAG
11AD
11AD
PX351 BDAG
PX3511 BDAG
11BD
11BD
TEMP. RANGE (°C)
0 to +85
0 to +85
0 to +85
0 to +85
0 to +85
0 to +85
0 to +85
0 to +85
PACKAGE
8 Ld SOIC (Pb-free)
8 Ld SOIC (Pb-free) Tape and Reel
10 Ld 3x3 DFN
10 Ld 3x3 DFN Tape and Reel
8 Ld SOIC (Pb-free)
8 Ld SOIC (Pb-free) Tape and Reel
10 Ld 3x3 DFN
10 Ld 3x3 DFN Tape and Reel
PKG. DWG. #
M8.15
M8.15
L10.3x3
L10.3x3
M8.15
M8.15
L10.3x3
L10.3x3
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
Pinouts
PX3511ACB, PX3511BCB
(8 LD SOIC)
TOP VIEW
PX3511ACR, PX3511BCR
(10 LD 3x3 DFN)
TOP VIEW
UGATE
BOOT
PWM
GND
1
2
3
4
8
7
6
5
PHASE
PVCC
VCC
LGATE
CRD
UGATE L
USB
BOOT
N/C
PPR
C M
PW HG
1
2
3
4
10
9
8
7
BAT
PHASE
ICDL
PVCC
N/C
GND
VCC
USBP
OVP
NTC or GND
5
6
IUSB
LGATE
or EN
Block Diagram
PX3511A AND PX3511B
VCC
UVCC
BOOT
UGATE
+ 5 V
Pre-POR OVP
FEATURES
SHOOT-
PHASE
PWM
10K
POR/
THROUGH
PROTECTION
(LVCC)
PVCC
UVCC = VCC FOR PX3511A
UVCC = PVCC FOR PX3511B
CONTROL
2
8K
LOGIC
PAD
LGATE
GND
FOR DFN -DEVICES, THE PAD ON THE BOTTOM SIDE OF
THE PACKAGE MUST BE SOLDERED TO THE CIRCUIT’S GROUND.
FN6462.0
February 26, 2007
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